Design & Reuse IPSoC China 2017

Sankalp Semiconductor will be exhibiting at Design & Reuse IPSoC China 2017 on 14th September in Shanghai. The event also will feature an industry talk by Samir Patel, CEO, Sankalp Semiconductor.

Featured Talk at IPSoC China:

When: From 9:45 am to 10:30 am on 14 September 2017

Topic:  “Changing Dynamics in the Semiconductor Industry” Samir Patel, CEO, Sankalp Semiconductor

Location: Evergreen Laurel Hotel, Pudong New District, Pudong, 201203 Shanghai, China

To set-up a Meeting at the event, please send us an email at marcom@sankalpsemi.com

For More information on Design & Reuse IPSoC, Shanghai please visit

http://www.design-reuse-embedded.com/ipsocdays/shanghai2017.jsp

About Sankalp Semiconductor

Sankalp Semiconductor offers an integrated portfolio of services and solutions to its customers in key semiconductor domains including digital, analog, high-speed physical interface IP, Embedded Memory Compiler and EDA modelling. Sankalp Semiconductor is a preferred semiconductor design service partners to multiple Fortune 500 companies in the Automotive, Consumer Electronics, Industrial IoT and Medical electronics space. The company enables its customers achieve their time-to-market window by delivering first pass silicon designs and engage with product engineering teams across the globe to design System-on-Chip. Sankalp Semiconductor is based in Sunnyvale, California, with multiple development and services centers in India, Canada and Germany. www.sankalpsemi.com

Past Events

Sankalp Semiconductor to present three technical papers at CDNLive Bangalore

Bangalore, India - Sankalp Semiconductor a design service company offering comprehensive digital & mixed signal SoC solutions, will be presenting papers at CDNLive India 2017. Sankalp Semiconductor team focuses on Just-in-time design methodology that leverages automation in design for improving the productivity. The selected papers cover wide range of technical topics related to SRAM memory optimization, layout tool and floorplanning. Sankalp team will be presenting the following three papers.

  1. Fast and accurate Multi-Corner and Monte-Carlo Optimization for SRAMs (Jointly with ARM)
  2. Layout versus XLS (LVX) Tool
  3. Intelligent Design Estimator (The Floorplanner Tool)

When: September 7-8, 2017, between 9 am to 6 pm.

Where: Park Plaza Hotel, Bengaluru, India.

Contact: marcom@sankalpsemi.com

 

About CDNLive

CDNLive India 2017 brings together Cadence® technology users, developers, and industry experts for two days of networking, sharing best practices on critical design and verification issues, and discovering new techniques for designing advanced silicon, SoCs, and systems.

https://www.cadence.com/content/cadence-www/global/en_US/home/cdnlive/india-2017.html

 

About Sankalp Semiconductor

Sankalp Semiconductor offers an integrated portfolio of services and solutions to its customers in key semiconductor domains including digital, analog, high-speed physical interface IP, Embedded Memory Compiler and EDA modelling. Sankalp Semiconductor is a preferred semiconductor design service partners to multiple Fortune 500 companies in the Automotive, Consumer Electronics, Industrial IoT and Medical electronics space. The company enables its customers achieve their time-to-market window by delivering first pass silicon designs and engage with product engineering teams across the globe to design System-on-Chip. Sankalp Semiconductor is based in Sunnyvale, California, with multiple development and services centers in India, Canada and Germany. www.sankalpsemi.com

Sankalp Semiconductor to participate in a panel discussion at the annual SOI Silicon Valley Symposium
D&R IPSoC 2017