IP Verticals

Combo PHY

Sankalp’sCombo PHY’s,target a wide range of end applications. The different PHY architectures are silicon proven and characterized in the 28nm process geometry.

  • LPDDR3/2 PHY
  • PCIe Gen2 / USB3.0 / SATA 3 PHY
  • HDMI / DP Combo Receiver
Embedded Display Port

Analog & Mixed Signal Design

Analog IP Market Segments


1.  PLL for HDMI display port

2.  Integer N PLL

3.  Fraction N PLL (1.4 G  -  3.6 G)

4.  700 MHz to 1.4 GHz PLL

5.  3.2GHz to 6.4Ghz PLL

6.  1GHz to 2GHz PLL

7.  PLL and CDR for MPHY

1.  100MSPS 8Bit Pipeline ADC

2.  1MSPS, 14Bit HV-SARADC

3.  10-Bit 4 MSPS SAR-ADC

4.  14BIT 12.5MSPS 3.3V Hybrid ADC

5.  14BIT 12.5MSPS 1.8V SAR Assisted PADC

6.  General purpose ADC’s with Analog Mux

7.  General purpose voltage DAC’s

1.  High Speed (GHz) Low Jitter PLL’s

2.  Serializer/Deserializer Circuits

3.  High Speed LVDS and CML I/O’s

4.  Clock Data Recovery Circuits

5.  DLL Circuits

6.  PCI Express

1.  General purpose ADC’s and DAC’s

2.  Crystal Oscillators

3.  Power On Reset Circuits

4.  Oscillators with no external components

5.  Voltage Regulators

6.  USB 2.0 PHY

7.  Temperature Sense Circuits

Analog IP Portfolio

ADC – Analog/Digital Converters (30)

  •   100MSPS 8Bit Pipeline ADC
  •   1MSPS, 14Bit HV-SARADC with temp sensor
  •   10-Bit 4 MSPS SAR-ADC

BGB – Bandgap Reference and Bias Buffers (14)

CMP – Comparators (8)

DAC – Digital/Analog Converters (30)

  •   4MSPS 10 Bit Low Power DAC
  •   Design of 12/10 Bit 1MSPS R-2R DAC and its Output Voltage Buffer Design

DLL – Delay Lock Loops (15)

  •   Analog and Digital DLL’s
  •   Memory Interface (DDR1/2, DDR2/3) DLL’s

PLL –   Phase Lock Loops (26)

  •   700MHz to 1.4GHz PLL with Norma
  •   Sp3.2GHz to 6.4Ghz PLL with Fast Lock Loop architecture
  •    2GHz to 4GHz PLL with FLL
  •    1GHz to 2GHz PLL with wide input frequency range

POR –   Power on Reset Circuits (14)

SH –   Sample and Hold Circuits (5)

VR –   Voltage Regulators (6)

XTAL –Oscillators (16)

  •   32KHz – 50 MHz Crystal Oscillators
  •   30 – 100 MHz 3rd Overtone Crystal Oscillators

IO Library Development

Special I/O Portfolio

LVDS -Low Voltage Differential Signaling (12)

  •   Frequencies from 50 MHz to 1.244 GHz

LVTTL – Low Voltage Transistor Logic (20)

  •   Frequencies up to 240 MHz

LVCMOS – Low Voltage CMOS (10)

USB –   Universal Serial Bus (6)

  •   USB 1.1
  •   USB 2.0

Silicon Validation

A Testchip service is available that allows the IP to be verified before it is used in the customers chip. Sankalp designs the test chip, designs the test board, manufactures the test board, packages the die and performs characterization testing of the test chip. The deliverables will include a characterization report for each IP and a test board with test chips that allow the customer to perform additional testing if necessary. 

Why Sankalp

Sankalp has worked with numerous clients over the years and delivers through: 

  • A very experienced analog and digital engineering team
  • Proven methodology
  • Broad portfolio of silicon-proven IP in leading edge processes
  • State-of-the-art EDA infrastructure
  • 24 hour productivity across globe

We are committed to constantly adding value to our customers who benefit through:

  • Scalable resources
  • Lower capital expenditure
  • Reduced time to market
  • Cost-effective and reliable outsourcing
  • Cost-effective off-shore operation